651-905-3729 Microsoft Silver Learning Partner EC Counsel Reseller compTIA Authorized Partner

z/OS Assembler Programming, Part 3: z/Architecture and z/OS Virtual Classroom Live September 14, 2026

Price: $3,400

This course runs for a duration of 4 Days.

The class will run daily from 10 AM ET to 5 PM ET.

Class Location: Virtual LIVE Instructor Led - Virtual Live Classroom.

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Description

The focus is on the changes introduced with z/Architecture machines and later z/OS Assembler language features, macro changes; 64-bit arithmetic; AMODE 64 considerations; working with ASCII and Unicode data; additional hardware instructions (over 500 instructions are covered); structure of the 64-bit address space; linkage conventions and save areas.

At the end of his course, students will be able to:

  • Describe the major architectural changes introduced with the z/Architecture
    class of mainframes
    Write Assembler programs that use the new instructions, particularly
    Long displacement instructions
    Relative branch instructions
    • Instructions to set and test current addressing mode
    • Instructions to load all or parts of 64-bit registers, and to shift and rotate bits within registers
    • Instructions to perform 64-bit binary arithmetic
    • Instruction to test packed decimal data for validity
    • New instructions that can set and test bits in storage or registers
  • Work with files encoded in EBCDIC, ASCII, or Unicode
    Code, assemble, bind, and run programs that run AMODE64
    Use new features of DROP, EQU, ORG, and CNOP 

Audience

Programmers needing to understand and use the new hardware and software services to support 64-bit addressing.

Course Overview

Introduction to the Course

A. General Introduction
B. z/Architecture
C. Numbers and Numeric Terms 

Fundamentals - A Quick Review

A. Programming Concepts
B. Source, Object, and Load Modules
C. Memory and Data Representation
D. Addresses
E. The CPU
F. Computer Exercise: Setup for Labs 
G. Machine Instruction Formats
H. Base / Displacement Addresses
I. Assembler language and the High Level Assembler (HLASM)
J. Basic Program Structure
K. Computer Exercise: Assembling, Linking, Running  

The Advent of z/Architecture

A. The CPU
B. The Assembler, Part 1
C. Computer ​Exercise: The Assembler, Part 1 

The Assembler, Part 2

A. Assembler Parms
B. Sources for Assembler Parms (Installed defaults, *PROCESS statements,
C. ASMAOPT data set, PARM on EXEC JCL statement)
D. Computer Exercise: Assembler Parms

Linkage Issues - Branching and AMODE Setting

A. PSW Format
B. Address Calculation
C. Register Format
D. Loading Addresses LA, LAY, LARL
E. Long Displacement Facility
F. Changing Addressing Modes
G. Passing Control Without Switching AMODE
H. Extended Mnemonics
I. Instruction Analogs
J. Passing Control And Switching AMODE
K. Switching AMODE Without Passing Control
L. Testing the Current AMODE
M. Running Around in AMODE-64
N. Computer Exercise: Setting and Testing AMODEs  

Storage Management and I/O Concerns

Register Management

Macro extensions and debugging

Decimal Data

Binary Arithmetic

Boolean Instructions

Shifting and Rotating - Bits in Registers

Working With Character Strings

Working With ASCII Data in z/OS

Introduction to Unicode

Working With Unicode Strings in z/Architecture

The Extended-immediate Facility

The Dead Zone, and More

More Thoughts on AMODE64

HLASM update

Newer hardware instructions

More High Level Assembler

More Instructions by Facility

Still more instructions

Appendix: Listing of ASMREPT code as supplied

Prerequisites

z/OS Assembler Programming, Part 2 or equivalent experience

Other Available Dates for this Course

Virtual Classroom Live
June 08, 2026

$3,000.00
4 Days    10 AM ET - 5 PM ET
view class details and enroll
Virtual Classroom Live
January 11, 2027

$3,400.00
4 Days    10 AM ET - 5 PM ET
view class details and enroll