The focus is on the changes introduced with z/Architecture machines and later z/OS Assembler language features, macro changes; 64-bit arithmetic; AMODE 64 considerations; working with ASCII and Unicode data; additional hardware instructions (over 500 instructions are covered); structure of the 64-bit address space; linkage conventions and save areas.
At the end of his course, students will be able to:
Audience
Programmers needing to understand and use the new hardware and software services to support 64-bit addressing.
Introduction to the Course
A. General Introduction
B. z/Architecture
C. Numbers and Numeric Terms
Fundamentals - A Quick Review
A. Programming Concepts
B. Source, Object, and Load Modules
C. Memory and Data Representation
D. Addresses
E. The CPU
F. Computer Exercise: Setup for Labs
G. Machine Instruction Formats
H. Base / Displacement Addresses
I. Assembler language and the High Level Assembler (HLASM)
J. Basic Program Structure
K. Computer Exercise: Assembling, Linking, Running
The Advent of z/Architecture
A. The CPU
B. The Assembler, Part 1
C. Computer Exercise: The Assembler, Part 1
The Assembler, Part 2
A. Assembler Parms
B. Sources for Assembler Parms (Installed defaults, *PROCESS statements,
C. ASMAOPT data set, PARM on EXEC JCL statement)
D. Computer Exercise: Assembler Parms
Linkage Issues - Branching and AMODE Setting
A. PSW Format
B. Address Calculation
C. Register Format
D. Loading Addresses LA, LAY, LARL
E. Long Displacement Facility
F. Changing Addressing Modes
G. Passing Control Without Switching AMODE
H. Extended Mnemonics
I. Instruction Analogs
J. Passing Control And Switching AMODE
K. Switching AMODE Without Passing Control
L. Testing the Current AMODE
M. Running Around in AMODE-64
N. Computer Exercise: Setting and Testing AMODEs
Storage Management and I/O Concerns
A. Obtaining Storage
B. AMODE 31 I/O Issues
C. Notes
D. Computer Exercise: Setting up I/O for AMODE 31
Register Management
A. Storing Register Contents, Unchanged, To Memory
B. Loading Memory Contents, Unchanged, Into Registers
C. Move Data (unchanged) Between Registers
D. Linkage conventions E. Computer Exercise: Preparing for 64-bit Programs
Macro extensions and debugging
A. Macro support (SYSSTATE, CALL, IAVR64)
B. Debugging information
C. Symptom dumps
D. SYSUDUMPS
E. Computer Exercise: Using Memory Objects
Decimal Data
A. Numeric characters - EBCDIC
B. Numeric characters - ASCII
C. Numeric characters - Unicode
D. Zoned decimal data and signs
E. Packed decimal
F. PACK, PKA, PKU, UNPK, UNPKA, UNPKU, TP
G. CVB, CVBY, CVBG, CVD, CVDY, CVDG
H. Computer Exercise: Packed Decimal Data
Binary Arithmetic
A. Halfword Binary Arithmetic
B. Fullword and doubleword binary arithmetic
C. Logical binary loads
D. Other binary loads
E. Logical binary arithmetic
F. Computer Exercise: Binary Arithmetic
Boolean Instructions
A. Working with bits
B. OR instructions
C. AND instructions
D. Exclusive OR instructions
E. Test Under Mask instructions
F. Halfword Immediate Test instructions
G. Load and Test instructions
H. Zero Out Parts of a Register
Shifting and Rotating - Bits in Registers
A. Shift Instructions
B. Grande Shifts
C. Shift Instruction Processing
D. Rotate Instructions
Working With Character Strings
A. Working With Character Strings in z/Architecture
B. Interruptible Instructions
C. CPU-Determined Unit of Processing
D. More Instructions for Working With Character Strings in z/Architecture
E. Additional long displacement instructions
F. TRTR
Working With ASCII Data in z/OS
A. Encoding Schemes
B. Working With ASCII Data in z/Architecture
C. Big Endian and Little Endian D. Load Reversed
E. Store Reversed F. Working With ASCII Data, continued
G. Computer Exercise: Supporting ASCII Data
Introduction to Unicode
A. Characters, Glyphs, and Fonts
B. Coding Schemes and Codepages
C. Unicode
Working With Unicode Strings in z/Architecture
A. CUUTF, CUTFU, CLCLU, MVCLU, TROO, TROT, TRTO, TRTT
B. CU24, CU21, CU42, CU41, CU12, CU14, SRSTU
The Extended-immediate Facility
A. AF, AGFI, ALFI, ALGFI, CFI, CGFI, CLFI, CLGFI, SLFI, SLGFI, NIHF, NILF,
B. XIHF, XILF, OIHF, OILF, IIHF, IILF, LGFI, LT, LTG, LBR, LGBR, LHR,
C. LGHR, LLCR, LLGCR, LLC, LLHR, LLGHR, LLH, LLIHF, LLILF
The Dead Zone, and More
A. The z/OS Address Space
B. The Dead Zone
C. The IEABRC macro and IEABRCX copy book
D. Computer Exercise: Using IEABRCX
More Thoughts on AMODE64
A. The Assembler and the Binder
B. Program Fetch
C. More Linkage Issues
D. AMODE64 Linkages
E. Macro support for AMODE64 programs
HLASM update
A. Reference external symbols on RI instructions
B. Enhancements to EQU, ORG, CNOP
C. Extended mnemonics
D. Address space partitioning
Newer hardware instructions
A. Overview
B. Load and Store instructions
C. Compare and Branch, Compare and Trap, other New Compare Instructions
D. New Execute Instruction
E. Working with binary data - add, multiply, rotating bits in registers
F. New Move instructions
G. New Translate and Test instructions
H. Computer Exercise: Using Compare and Branch
More High Level Assembler
A. Additional extended mnemonics
B. Mnemonic tagging
More Instructions by Facility
A. Overview
B. High-Word Facility instructions
C. Interlocked-Access Facility instructions
D. Load/Store-on-condition Facility instructions
E. Distinct Operands Facility instructions
Still more instructions
A. The Miscellaneous-instructionextensions facility
B. The Load-and-trap facility
C. The Interlock-access facility, 1 and 2
D. The Load/Store-on-Condition facility
E. The Execution-hint facility
F. The Processor-assist facility
G. The Transaction-execution facility
Appendix: Listing of ASMREPT code as supplied
z/OS Assembler Programming, Part 2 or equivalent experience
